The present invention relates to a memory unit for storing image data and other two-dimensional data and, more particularly, to a two-dimensional memory unit which allows two-dimensional data to be written and read along axes which are different from each other.
A two-dimensional memory unit, or bit map memory, is extensively used with various kinds of equipment. In a graphic display, for example, a two-dimensional area having numerous fine pixels arranged two-dimensionally therein is associated with a screen, and one or more bits of memory are allocated to each of the pixels. When image data read by an image scanner need be stored in the event of printing which uses a laser printer or like recorder, it is necessary to use a two-dimensional memory unit for a buffer memory.
In a two-dimensional memory unit of kind described, individual memory cells are accessible on the basis of x and y addresses which are associated with, respectively, an x and a y axis of input image, so that a desired pixel of an image may be rapidly accessed in a memory. When an input image and/or an output image is scanned at a high rate, a prerequisite is that the period of time necessary for accessing each memory cell be extremely short. However, a memory with a short access time is prohibitively expensive. For this reason, it is a common practice to use a parallel data type memory unit in which eight bits are assigned to each memory address and represent a pixel address with respect to the direction of main scanning, which occurs at a high rate, in terms of an X direction address XM of the memory and a bit position BM of a particular memory cell. Specifically, eight memory cells located at the same address are associated with eight pixels whose pixel addresses x are continuous. It follows that when the memory is continuously accessed in the x direction timed to scanning, eight pixels are accessed at the same time resulting that the access time required of the memory is eight times longer than the access time for each pixel.
In a two-dimensional memory unit of the kind described, while rapid access is achievable so long as a string of pixels arranged in the main scanning direction are accessed, it is unachievable when it comes to a group of pixels arranged in the subscanning direction because the memory address changes with the pixel, i.e., the memory has to be accessed for each pixel. In a digital copier, for example, in the event when an image read by an image scanner is recorded by a laser printer, it is sometimes desired to change the scanning direction associated with the input image and the scanning direction associated with the recorded image by 90 degrees relative to each other. This is impracticable, however, because the scanning direction of an image scanner and that of a laser printer are mechanically determined. If an image read by an image scanner is temporarily stored in a two-dimensional memory unit, the scanning direction can be electrically changed by 90 degrees by switching the X, Y address for accessing the memory depending upon the read/write operation. Nevertheless, an ordinary two-dimensional memory unit cannot change the scanning direction without lowering the accessing rate as stated above, failing to performing rapid processing.
An implementation for solving the above problem is disclosed in Japanese Laid-Open Patent Publication (Kokai) No. 61-173354/1986. While the implementation disclosed is capable of accessing eight pixel data at a time in each of x and y scanning directions, a prohibitively complicated address generation circuit is required when the memory capacity is large. In addition, since it inputs and outputs data on a word basis through a data bus, the pixel access time is not constant causing a delay to occur every time the word is replaced. This kind of memory device, therefore, is not applicable to a case wherein pixel data have to be inputted and outputted at a constant period timed to the scanning timing of an input device and that of an output device.